The present invention relates generally to systems having an expansion bus configured to handle expansion cards designed to different versions of the expansion bus standard. More particularly, the it relates to a technique for selectively isolating xe2x80x9creservedxe2x80x9d signals from expansion cards that treat those signals incorrectly.
Generally stated, the term xe2x80x9cpower managementxe2x80x9d refers to the ability of a computer system to conserve or otherwise manage the power that it consumes. Many personal computer systems conserve energy by operating in special low-power modes when the user is not actively using the system. Although used in desktop and portable systems alike, these reduced-power modes particularly benefit laptop and notebook computers by extending the battery life of these systems. Some computer systems automatically enter low-power mode when a user has not performed a certain action within a given period of time. The computer might power down the monitor if the video display has not recently changed, for example, or may power down the hard drive if the user has not recently opened or saved any files onto the hard disk. If the computer detects a period of inactivity, the computer may enter a xe2x80x9cdeep sleepxe2x80x9d mode in which power is completely cut off to all but a few devices within the computer. In addition, the user often can initiate the sleep mode through a menu in the operating system (OS) or by pressing a power button on the computer. Typically the memory contents are preserved so that the computer returns to the same state that it was in when the sleep mode began.
There are many ways that have been used to implement an energy-conserving reduced-power mode. Examples include hard off (power is disconnected), soft off (power is supplied only to components which monitor activity external to the system), hibernated power state (contents of memory are stored on disk and current state of computer is preserved while power consumption is reduced to a minimum level), suspend mode (all central processor activities are halted, but power to memory is maintained and dynamic RAM is refreshed), and sleep mode (the clock signal is reduced or halted to some or all of the system components during periods of inactivity). The sleep and suspend modes may each be invoked at various levels, depending on the particular implementation of these modes, and recovery from these modes is implementation specific.
Although these reduced-power modes may render the computer temporarily or partially inoperable, the user can generally restore full-power, or xe2x80x9cwake upxe2x80x9d the computer, at any time. For example, the computer may automatically restore video power if the user moves the mouse or presses a key on the keyboard, or might power up the hard disk if the user attempts to open or save a file. The source of the triggering activity may come from a local mechanism (i.e. a switch or sensor of any kind such as a power switch, a reset switch, a pressable key, a pressure sensor, a mouse, a joystick, a touch pad, a microphone, or a motion sensor), or the trigger source may be remote. For example, some computers have the capability to wake automatically in response to incoming phone calls detected by a modem or to wakeup messages received over a local area network (LAN). Sleep mode is often an attractive alternative to completely shutting the computer down, because the computer consumes little power during sleep mode and because waking up from sleep mode typically is much faster than rebooting the system. Also, the ability to remotely awaken a computer increases its usability and maintainability. For example, a user can remotely retrieve files even when the computer was powered down, and a system administrator can perform system maintenance after hours without needing to physically visit each computer.
Early implementations of the various power modes required the computer hardware itself to monitor user activity and determine the proper power state for each device in the computer system. These early computer systems included a read only memory (ROM) device that stored a set of instructions for the computer to follow in order to carry out power management functions. The set of instructions formed part of the Basic Input/Output System (BIOS) of the computer, which also included instructions for procedures such as accessing data on a hard or floppy disk drive and controlling the graphics display. The ROM device containing the BIOS is referred to as the xe2x80x9cBIOS ROMxe2x80x9d. Because hardware-based power management instructions usually are included in BIOS, such a management scheme is commonly known as xe2x80x9cBIOS power managementxe2x80x9d. Under BIOS power management, conditions within the computer system that initiate power state transitions, such as button presses and periods of inactivity explained above, generate system management interrupt (SMI) signals to the central processing unit (CPU). Upon receiving an SMI, the CPU executes the BIOS power management instructions stored in ROM to change the power state.
More recently, the Advanced Configuration and Power Interface (ACPI) specification, written collaboratively by Intel, Microsoft, and Toshiba, has introduced the concept of managing power functions using the computer"" operating system software (e.g., Windows(copyright) 98 and Windows(copyright) NT). Centralizing power management within the operating system, in contrast with earlier hardware-based power management techniques, allows computer manufacturers to make simpler, less expensive hardware components that do not have to manage their own power states. Instead, these devices need only to respond to power management commands from the operating system. In general, operating system-based power management enables the computer system to implement relatively complex power management procedures that may have been difficult, if not impossible, to realize using a more decentralized, hardware-based approach. In fact, implementing power control through ACPI, instead of through traditional hardware methods, can significantly reduce the power consumption of some computer systems. Operating system-based power management also provides the user with some level of power management control.
Under ACPI, a computer system can be placed in one of six graduated reduced-power system states, which do not necessarily correspond (in functionality or in name) to the power down modes recited above. The six system power states, S0, S1, S2, S3, S4, and S5, which encompass varying levels of system activity ranging from fully operational (S0) to xe2x80x9csoft offxe2x80x9d (S5). Power states S1-S5 represent sleeping states, in which the computer system is neither fully operational nor completely powered off. The sleep states generally encompass varying levels of system activity (or xe2x80x9ccontextxe2x80x9d) and require different lengths of time (or xe2x80x9cwakeup latenciesxe2x80x9d) to return to fill power. Because sleep state S5 represents the deepest sleep state, it may also be referred to equivalently as the xe2x80x9coffxe2x80x9d state or as the lowest-power state.
Transitioning between the system power states generally requires cooperation between the operating system and the computer hardware. The computer provides a set of ACPI registers which the operating system can access. To transition to one of the sleep modes from full-power mode (S0), the operating system stores special sleep codes into a pair of ACPI control registers. The sleep code includes a sleep enable bit and three sleep-type bits. The sleep-type bits generally identify one of the power states S1-S5. Upon detecting that the operating system has set (or xe2x80x9cassertedxe2x80x9d) the sleep enable bit, the computer places itself into a sleep mode as defined by the sleep-type bits.
As stated above, the operating system may direct the hardware to place itself into a sleep mode for a variety of reasons. For example, the computer hardware may provide a timer that expires after a predetermined time of inactivity within the system, prompting the operating system to place a sleep request into the sleep-type and sleep enable bits of the control register. Alternatively, the operating system may write a sleep request to the control register after detecting that the user has initiated a sleep mode through the software interface, pressed sleep button on the computer chassis, or simply closed the computer screen (e.g., on a laptop computer). When the sleep enable bit of the control register is asserted, the computer system places itself into the low-power mode indicated by the value of the sleep-type bits.
The ACPI protocol also includes a status register to enable system wakeup. The status register includes a wake status bit. The wake status bit typically is set if the user presses a wakeup button or power button on the computer. Certain devices in the computer system, such as the modem or network interface card (NIC), also may cause the wake status bit to be set in response to incoming messages (e.g., phone rings or network xe2x80x9cwakeupxe2x80x9d messages). When the operating system detects that the wake status bit has been set, the operating system transitions computer operation to the S0 mode.
To accommodate the evolving power management technology, the Peripheral Component Interconnect (PCI) bus specification has been revised to designate one of the previously reserved card connector pins as a Power Management Event (PME#) signal. Asserting the PME# signal (by driving it low) sets the wake status bit in the ACPI status register (in ACPI-compliant systems) or otherwise initiates the wake-up process of the computer.
Although the correct way to treat a reserved pin is to leave it as a no-connection (NC) pin, many manufacturers have grounded the reserved pins as a matter of course. With the revision to the specification, the PCI devices made by such manufacturers cause the PME# signal to be constantly asserted. In some systems, these non-compliant devices prevent the system from shutting down when the power management functions are enabled. In other systems the conflict between the shutdown and wake-up commands may cause the system to cycle between states or get caught in an intermediate state (i.e. xe2x80x9clock-upxe2x80x9d).
The problems described above are at least in part addressed by a system and method for handling devices that assert a wake-up signal in an improper fashion. It is observed that any wake-up signals that remain asserted as the computer system enters a low-power mode are likely produced by non-compliant cards, and to assure proper functioning of the system, it is desirable for the computer system to selectively block assertion of asserted signals from non-compliant cards. In one embodiment the computer system includes an expansion bus coupled to a bus bridge, and a signal gate. The expansion bus includes a wake-up signal that the signal gate can be configured to isolate from the bus bridge. The signal gate is preferably controlled by the power management controller. The power management controller sets the signal gate to isolate the signal from the bus bridge if the controller determines that wake-up signal is being driven in a non-standard manner. The non-compliance may be determined by: (a) detecting a transition of the computer to a reduced power state; (b) pausing for a predetermined delay; and (c) sampling the wake-up signal to identify any asserted wake-up signals. In the presence of non-compliant expansion cards, the disclosed embodiments may advantageously assure correct operation of the system with minimal additional cost.